Course Instructor: Adrian Petrescu, Decebal Popescu.

Learning the knowledge that concerns the architecture of the calculation system, including the architecture of the instruction set. The study of the main processors types: CISC, RISC and of the evaluation methods of their performances (SPECint and SPECfp). Design and implementing an RISC processor, with a conventional and micro programmed command unit. Design a processor that operates in one single clock cycle. Design a processor that makes an instruction in more than one clock cycles. Operating in assembling set: Operations in the assembling sets section; The assembling sets problems: Structural hazards, data hazards, control hazard; The assembling sets performance. The modern structure and architecture of the processors. The main memory. Tendencies in the memory technology domain. Static memories. Dynamic memories. Organizing the main memory. Parameters. Performances. Organizing the memory in calculation systems. Associative memories. The intermediary memory. Virtual memory. Organizing the main memory on blocks. Organizing the input/output. Measuring the I/E subsystems performance.

Syllabus:

• The architecture, organization, and structure of the numerical computer.
• Design a simple processor, type RISC.(DLX/MIPS).
• Implementing the DLX/MIPS processor.
• Design a processor that operates in one single clock cycle.
• Design a processor that makes an instruction in more than one clock cycles.
• Operating on an assembling set.
• Main memory.
• Memory and number language organization.
• Organizing the input/output.